1. Field of the Invention
Methods and apparatuses consistent with the present invention relate to a memory system, and more particularly, to a method and apparatus for accessing a linear addressable memory (LAM) using a three-dimensional address (3-D) mapping.
2. Description of Related Art
FIG. 1 is a diagram illustrating a case of accessing a memory block according to a related art. When a double loop of 2×2 array exists in a program, an address of a memory accessed by the double loop is not sequential. As illustrated in FIG. 1, four data are included in a block to access 120. In this instance, a linear addressable memory (LAM) is required to access memory at least four times. To reduce the four times of accessing memory, a block access is used. For example, four aligned blocks are interpreted by a single memory access. However, even in this case, when all data to be interpreted is not included in a single aligned block, several memory accesses are still required. In FIG. 1, all data included in the block to access 120 is included in different aligned blocks. For example, an address 23 of the block to access 120 is included in an aligned block 110. In this case, to access all data included in the block to access 120, it is required to access memory four times.
Also, double loops or triple loops occur frequently in many different kinds of programs. Particularly, triple loops are frequently used in a program for video processing. Accordingly, a method and apparatus for efficiently accessing a memory accessed by the triple loop is needed.